In the semiconductor industry, lead frames are typically provided for semiconductor devices in order to provide a stable support pad for firmly positioning a chip within a package, and to electrically connect the chip (e.g., an integrated circuit or IC) to various other components via a circuit board. The lead frame is typically comprised of an electrically conductive material (e.g., a metal), wherein each lead frame may be comprised of a plurality of electrically conductive segments such as internal leads, external leads, tie bars, and a die (chip) pad. The die pad is centrally located on the lead frame and provides a surface on which the chip may be mounted. Lead frames typically vary in size, wherein the size of the lead frame is commonly dependent upon one or more of the size of the chip and the number of connections that are made to the chip.
Internal leads are electrically conductive segments of the lead frame that are brought into close proximity to contact pads associated with a surface of the chip. External leads are also electrically conductive segments that are generally remote from the IC chip, are operable to electrically and/or mechanically connect the internal leads and chip to external circuitry, such as in an assembly of a printed circuit board (PCB). During packaging, the die pad of typical lead frames is downset, and the chip is mounted to the die pad. A gap is typically provided between an inner tip of each of the internal leads and the chip, wherein the gap is bridged by a thin metallic connecting wire, therein electrically connecting each internal lead of the lead frame to a respective contact pad of the chip. The die pad, chip, internal leads, and associated connections are subsequently encapsulated in an encapsulating material, and excess lead frame material, such as carrier rails for the lead frame, may then be trimmed away. For example, the dam bar provides a dam or “stop” for the encapsulation material during encapsulation, and further generally connects the external leads to one another. Once the chip is encapsulated, the dam bar is trimmed away so that a plurality of individual electrically conductive paths are generally defined from the chip through each respective wire, internal lead, and external lead, and wherein the electrically conductive paths are further electrically isolated from one another.
It has been common practice to manufacture lead frames from thin (about 120 to 250 μm) sheets of metal, wherein the lead frames may be manufactured in long strips of many individual units. The long strips may be wide enough to accommodate from one to more than five lead frames. When a strip is more than one lead frame wide, the strip is referred to as a matrix. A lead frame may be further equipped with carrier rails and guide holes to position the lead frames during manufacture and subsequent IC assembly. In one common example, lead frames are stamped from a continuous sheet of metal, such as a roll or reel of metal, as illustrated in the lead frame forming apparatus 10 of FIG. 1A. As illustrated, a first reel 15 of thin metal 20 is unwound and the thin metal fed into a progressive stamping tool 25, wherein the structures (not shown) of each lead frame are formed. Typically, the structures of each lead frame are formed in a single stamping tool, wherein internal leads, external leads, dam bars, tie bars, a die pad, index holes, and carrier rails are formed in the thin metal 20. Such a formation generally involves a progressive stamping tool with a plurality of individual dies (not shown) specifically operable to sequentially punch out each of the respective structures. After the sheet of thin metal 20 emerges from the progressive stamping tool 25, it is typically coiled onto a second reel 30. The second reel 30 of the stamped thin metal is then typically plated with another metal (not shown) in a separate plating apparatus 35, as illustrated in FIG. 1B, wherein the thin sheet of metal 20 is unwound from the second reel and passed through a cleaning station 36, activation station 37, one or more metal plating baths 38, and finally, a rinse and dry station 39. The sheet of thin metal 20 is subsequently rolled onto a third reel 40. Once the plated thin metal 20 (comprising the stamped and plated lead frame structures) is wound upon the third reel 40, the third reel is brought to a cut and downset apparatus 45, as illustrated in FIG. 1C. The thin metal 20 is then unwound from the third reel 40 and passed through the cut and downset apparatus 45, wherein the stamped and plated lead frames (not shown) are cut into sheets 50, and wherein the die pad of each lead frame is down set.
The desired shape of the lead frame is typically stamped from the original sheet in a single stamping process using a single stamping tool (e.g., the progressive stamping tool 25 of FIG. 1A), wherein the entire lead frame, including the internal leads and external leads, is generally defined in the single stamping process. In this manner, each individual segment of the lead frame (for both internal and external leads) takes the form of a thin metallic strip with its particular geometric shape determined by design. For most purposes, the length of a typical segment is considerably longer than its width. Internal leads are also significantly narrower than external leads, for purposes of providing each internal lead as close to the IC chip as possible given the small size of the chip. As a consequence, the punches (not shown) of the progressive stamping tool 25 utilized in forming the internal leads are typically smaller and much more delicate than the punches utilized for forming the external leads and the index (pilot) holes. Thus, the internal lead and die pad punches typically wear faster and fail more frequently than the external lead punches. Any such failure or wearing of the punches in the progressive stamping tool 25 typically leads to the stamping operation being halted for maintenance, therein reducing uptime, lowering output, and reducing tool life caused by more frequent sharpening.
Lead frames also typically provide a framework for encapsulating the sensitive IC chip and the fragile connecting wires. Encapsulation using plastic materials, rather than metal cans or ceramic, has been the preferred method because of the relatively low cost associated with the plastic materials. Reliability tests in moist environments have shown, however, that the molding compound should have good adhesion to the lead frame and the encapsulated components in order to provide reliable devices. Two major contributors to good adhesion are the chemical affinity of the molding compound to the metal of the lead frame and the surface roughness of the lead frame. Thus, plating or not plating of the original metal lead frame with an appropriate metal can effectuate good adhesion of the encapsulation compound to the lead frame, thus improving the reliability of the lead frame. Therefore, in the conventional lead frame forming apparatus 10 of FIGS. 1A–1C, once the entire lead frame has been stamped, the sheet(s) of thin metal 20 are typically plated with another metal in the plating apparatus 35 to produce a clean, non-reactive finish suitable for wire bonding on the internal leads and for soldering of the external leads after the IC is assembled. Such plating is typically performed after all structures (not shown) of the lead frame are formed, but prior to cutting and down-setting of the die pad.
Furthermore, in order to provide good adhesion for most molding compounds, as well as good electrical connections to the internal leads for wire bonding and good solderability to the external leads after encapsulation, typical lead frames are coated with multiple layers of nickel, palladium and gold, which exhibit good adhesion and conductive properties. However, it is well recognized that mold compounds show superior adhesion to copper than to nickel, palladium or gold. Due to cost considerations, however, use of noble metals in semiconductor manufacturing is closely monitored. As stated above, conventional lead frames are typically plated after both internal and external leads are formed, therein plating a substantially large surface area (e.g., plating the thickness of the sheet of metal for each punched-out area). Plating of such a large surface area can have a substantial impact on the cost of the semiconductor device, since the overall surface area of the lead frame can be quite large.
Because of the many sizes of chips or dies, there are also currently many different sizes and configurations of lead frames, such as quad flat pack or dual-in-line configurations. Complicated lead frame configurations may be further made by even more expensive progressive stamping tools. Typically, each stamping tool is utilized to form a distinct lead frame configuration, thus requiring a plurality of stamping tools for a respective plurality of lead frame configurations. Progressive stamping tools for leadframe typically cost hundreds of thousands of dollars and can take many months to build. Preparation and maintenance of stamping tools and processes for manufacturing lead frames may also result in increased lead frame costs, as well as extended cycle time from demand through development to production. Furthermore, these costs and delays typically recur with each new lead frame design.
Therefore, a need currently exists for a low cost and reliable process for manufacturing lead frames, wherein both the lead frame and its method of fabrication can be applied to different semiconductor product families. The lead frame and method should be flexible to provide a wide spectrum of design and assembly variations and should achieve improvements toward the goals of improved process yields and device reliability.